This thesis is focused on the design and
implementation of a multiphase interleaved boost power factor corrector (PFC) to achieve a high power factor, low input current harmonics, high efficiency and high power density. A multiphase interleaved boost PFC features the advantages of a PWM boost converter. In addition, the voltage and current ratings of the power switches, and the volumes of inductors, output capacitors and EMI filters can be reduced.
A 800W two-phase interleaved Boost PFC is
implemented in the laboratory. Experiments are conducted and satisfactory results are measured to confirm the effectiveness and the feasibility of the theoretical analysis and design consideration. The
UCC28060 is used as the control IC for the PFC. The power stage consists of two boost PFC converters. It is verified that the current ripples are greatly reduced with
the two-phase interleaved topologies. Thus the two-phase interleaved PFC’s are especially suitable for serving as a
pre-regulator in the high-power applications.
本文為主要目的係研製一具有高功因、低諧波、高效率及高功率密度之多相交錯式升壓型功率因數修正器。多相交錯式控制策略不但保有脈波寬度調變
(PWM)升壓型轉換器之優點,且在高輸出功率下更可改善功率元件高耐流、儲能電感體積過大、輸出電容過大及EMI 濾波器體積等問題。
本文實際製作一800 瓦雙相交錯式升壓型功率因數修正器,來驗證論文中所提之分析與設計考量是否合理。實作電路之控制IC 使用德州儀器公司所生產的
16 腳位UCC28060,功率級則採用雙組升壓型轉換器電路架構。經測量結果證明,雙相交錯式架構確實可以減少電流漣波,適用於大功率應用場合。