本計畫的目標在於利用金氧半場效電晶體(MOSFET)與異質接面電晶體(HBT)的組合來構建多種型式且易調變的N 型負微分電阻元件(negative differential resistance device, NDR device)，在此計畫中我們稱此類負微分電阻元件為【MOS-NDR 】、【MOS-HBT-NDR 】與【HBT-NDR】元件，其電流-電壓特性曲線與傳統負微分電阻元件， 例如共振穿透二極體(resonant tunneling diode, RTD)元件相比較，具有較佳電流-電壓特性曲線的調變性，且最大的優點為可與目前晶片設計製作中心(CIC)所提供的與CMOS 或BiCMOS 製程相配合。不像共振穿透二極體元件，其結構是由三-五族化合物半導體所構成，成長此類元件與電路，需要昂貴的MOCVD 或MBE 儀器配合，成本較高，且不易與其他元件或電路作系統整合。我們所研發的【MOS-BJT-NDR】負微分電阻元件，則可與相關元件與應用電路相整合於同一矽(Silicon)晶片上，達到積體電路化(IC)與系統晶片化(SoC)的目標。第三年計畫主題為設計多值記憶器電路設計、多值多工器電路、單穩態邏輯電路、與單穩態-雙穩態傳輸邏輯電路。
The purpose of this plan is to construct various and adjustable N-type negative differential resistance (NDR) device utilizing the combination of MOSFET and HBT devices. In this project, we regard this type of NDR device named as 【MOS-NDR 】、【MOS-HBT-NDR 】and 【HBT-NDR】device. Comparing to the traditional NDR device like RTD, the current-voltage curve of MOS- BJT-NDR device has a wide range of adjustable characteristic. The biggest merit of MOS-BJT-NDR lies in the fact that it can be implemented by the CMOS and BiCMOS processes provided by the CIC. Unlike RTD, which consists of III-V semiconductor compounds and the cost is high for implementation by the MOCVD or MBE system. It means that the RTD is not easy to integrate with other Si-based devices and circuits. However we propose the MOS-BJT-NDR device is easy to integrate with other devices and circuits on the same silicon chip to achieve the goal of integrated circuit (IC) and system-on-a-chip (SoC). The aim of the third year of our plan is to design the NDR-based applications including multiple-valued memory circuit, multiple-valued multiplexer, mono-stable logic circuit, and monostable-bistable transition logic element (MOBILE).