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    Please use this identifier to cite or link to this item: http://ir.lib.ksu.edu.tw/handle/987654321/6203


    Title: 應用於高解析度短距離汽車防撞雷達系統(SRR)之基頻晶片的研製與CAN Bus介面的整合
    Authors: 盧春林
    王宏祺
    林育聖
    Date: 2009-09-15
    Issue Date: 2009-12-29 16:29:14 (UTC+8)
    Abstract: 本計畫針對應用於多方向感測之短距離汽車雷達(SRR)提出一新的收發機架構。計畫核准補助一年,計畫執行一年共使用TSMC 0.13-μm 與0.18-μm CMOS 製程研製成功兩顆晶片,分別為「PSK transmitter」、以及「Programmable frequency divider」。量測結果顯示「PSK transmitter」之振盪器電路部分,其量測經倍頻器之輸出信號約為 20Hz且成功與外部輸入之1 GHz 類比基頻信號作調變,其輸出信號顯示約為19 GHz 及21 GHz;另一方面,「Programmable frequency divider」當輸入訊號的頻率等於6.9 GHz 以及輸入功率等於4 dBm 時,輸出訊號的頻率等於2.3 GHz、輸出功率為-9.3 dBm。經量測證明操作頻段可為3.1-8.1 GHz,並且在輸入頻率等於6.9 GHz 時,具有輸入功率等於-31 dBm的最佳輸入靈敏度。
    This one-year grant project proposed an architecture of SRR(Short Range Radar) transceiver for the applications in multi-target automotive environment. Two chips via TSMC 0.13-μm and 0.18-μm CMOS process were implemented in this year. They are “PSK transmitter" and “Programmable frequency divider" respectively. The measured result showed that the free-running frequency of VCO in “PSK transmitter" chip is around 10 GHz and the doubled frequency is around 20 GHz. The phase modulator of that chip is also verified successfully under a baseband frequency of 1 GHz and 19/21 GHz output signals are found. On the other hand, a 6.9-GHz and 4-dBm input signal is applied to the chip of “Programmable frequency divider". The chip is proved to be functional work because a 2.3-GHz and -9.3-dBm output signal is found. The divider has an operating frequency range from 3.1 to 8.1 GHz and a maximum input sensitivity of -31-dBm peak value at 6.9 GHz.
    Appears in Collections:[電腦與通訊系所] 研究計畫

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