本計畫在於使用TDOA(Time Different of Arrival)技術測定待測物位置,計畫執行內容則包括使用FPGA 模擬TDOA 定位技術所需之發射機與接收機,以及使用TSMC 0.18um製程研製定位發射系統相關RFIC,如高速可程式除頻器,以及高速Gold Code 產生器等。 計畫已經具體完成的項目主要有:(1)定位系統之FPGA 模擬實現,證明TDOA定位系統的可行性;(2)研製並量測完成1.5 GHz 可程式除頻器晶片,更已經將成果寫成論文,被CACS2006 接受為口頭發表論文。(3)通過cic 審查而已經在製作當中之高速Gold code 產生器晶片。 The main goal of this project is to design a wireless position system using TDOA (Time Different of Arrival)technology. The work of this year includes the implementation of TDOA transmitter and receivers on FPGA, and the realization of some RFIC(radio frequency integrated chip) to construct the transmitter of the wireless position system in the future. The achievements of this project include:(1)The implementation of the transmitter and the receivers for TDOA position on FPGA, it proves that position via TDOA technology is possible. (2)Chip implementation of an 1.5-GHz high-speed programmable divider, it is accepted by CACS2006 as an oral presentation paper. (3)Another chip, High-speed Gold Code Generator, has passed the application procedures and it is fabricated right now in TSMC 0.18um CMOS process.