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    Please use this identifier to cite or link to this item: http://ir.lib.ksu.edu.tw/handle/987654321/17380


    Title: Voltage-controlled multiple-valued logic design using negative differential resistance devices
    Authors: 蔡澈雄
    Keywords: Multiple-valued logic;BiCMOS technique;Negative differential resistance circuit;MOS;HBT
    Date: 2010-12
    Issue Date: 2012-09-07 11:14:14 (UTC+8)
    Abstract: This paper demonstrates a concise and novel voltage-controlled multiple-valued logic (MVL) design using the standard BiCMOS technique. This MVL circuit is constructed by a voltage-controlled negative differential resistance (NDR) circuit, which is integrated by the standard Si-based metal–oxide-semiconductor field-effect-transistor (MOS) and SiGe-based heterojunction bipolar transistor (HBT). There exists a two-peak current–voltage curve by connecting two integrated MOS–HBT–NDR elements in parallel as we suitably determine the width/length (W/L) of the MOS devices. In particular, each peak current can be effectively modulated by the corresponding controlled voltage. Using this special characteristic, we can obtain the three logic states with arbitrary sequence at the output.
    Relation: Solid-State Electronics, 54(12), 1637-1640
    Appears in Collections:[電子工程系所] 期刊論文

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