Kun Shan University Institutional Repository:Item 987654321/14271
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    Please use this identifier to cite or link to this item: http://ir.lib.ksu.edu.tw/handle/987654321/14271


    Title: Efficient Truncated Multiplier Design for Low Error
    低誤差之有效去尾式乘法器設計
    Authors: 郭源欽
    林智傑
    許明華
    Keywords: ECP
    LSP
    最大誤差
    均方誤差
    Date: 2007-09-28
    Issue Date: 2007-10-01 15:58:39 (UTC+8)
    Abstract: 於許多數位信號處理方面,去尾數法是被普遍應用在乘法器來改善硬體效能的方式,雖然採用去尾數法可避免過大的乘積運算所造成面積變大,速度的減緩以及功率消耗增加的缺點,但同時此方法卻也造成了不可避免的誤差產生,在這篇論文裡,我們所提出應用在去尾數乘法器方面的補償電路架構不同於近年論文提到皆只利用到所ECP(Error Compensation Part)來做為誤差的補償電路且只針對某誤差做改進,在不影響電路效能過多的條件下,本文利用ECP項及LSP(Less Significant Part)部份乘積項來做誤差補償項,此法對於最大誤差補償與均方誤差的誤差方面可同時做了改善,從模擬結果與之前論文研究結果的比較,對於獲得較低的最大誤差與均平方誤差具有好的誤差值。
    Appears in Collections:[Graduate School and Department of Electronic Engineering ] 2007 Conference on Innovative Applications of System Prototyping and Circuits Design

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