Siblings 2010健康照護實務創意設計大賽 [41/41] 2011健康照護實務創意設計大賽 [50/50] Collection Statistics 近3年內發表的文件: 0(0.00%) 含全文筆數: 64(100.00%) 文件下載次數統計 下載大於0次: 64(100.00%) 下載大於100次: 15(23.44%) 檔案下載總次數: 5487(16.37%) 最後更新時間: 2021-01-24 23:12 上傳排行 資料載入中..... 下載排行 資料載入中..... 最近上傳 適用於高解析度管線式類比數位轉換器之金氧半開關電容增益放大器 8-bit 類比數位轉換器佈局 Accuracy, Fast-Response, Cost-Effic... 改良型串接倍增脈波產生器所構成的新型電荷幫浦電路 An Automatic Design for Flash Memor... 系統單晶片雛型發展系統架構與設計方法 A Game Application for Embedded Lin... Design and Implementation of DCT Ac... The Embedded Middleware and Develop... MPEG-2 視訊解碼器之系統分析與軟硬體分割

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顯示項目1-25 / 64. (共3頁) 1 2 3 > >> 每頁顯示[10|25|50]項目

日期	題名	作者
2007-09-28	1 Gbps Programmable Gold Code Generator	H. –C. Wang; C. –Y. Lu; J. –C. Juang; C. –L. Lu
2007-09-28	A 16 Bit Adder/Subtractor using hybrid IGDI/CMOS design	Po-Ming Lee; Yun-Hsiun Hung; Wen-Pin Chen
2007-09-28	A 250MHz 20mW 11Bit Low-Hold-Pedestal Fully Differential CMOS Track-and-Hold Circuit	Tsung-Sum Lee; Chi-Chang Lu; Jian-Ting Zhan
2007-09-28	5.2 GHz Low Noise Amplifier With Source Degeneration	Meng-Ting Hsu; Kuo-Jui Li; Jhih-Huei Du
2007-09-28	50%工作週期輸出之DLL 倍頻電路設計	蔡明彰; 林建民; 賴昱廷; 鄭明哲
2007-09-28	6-T SRAM Cell 佈局之光學鄰近補償(OPC)基本設計及其光學微影模擬	唐經洲; 王敬堯; 陳水和; 田子坤; 王立洋
2007-09-28	8-bit 類比數位轉換器佈局	杜日富; 吳致達; 李信隆; 陳俊豪
2007-09-28	Accuracy, Fast-Response, Cost-Efficient Solar Cell Regulator Suitable for Low-Power Applications	Jiann-Jong Chen; Fong-Cheng Yang; Hsin-Tung Li and; Yuh-Shyan Hwang
2007-09-28	Altera SOPC系統處理器傳輸方法的研究與其應用	盧麗娟; 陳啟鏘
2007-09-28	An Automatic Design for Flash Memory Testing	Wei-Lun Wang; Zheng-Wei Song
2007-09-28	Constructing a Mixed Abstraction-Level Simulation Platform for H.264 MP Video Decoder	Ching-Hsiang Chuang; Yu-Lin Wang; Alvin W.Y. Su; Yi-Li Lin; Redtom Lin
2007-09-28	Design and Implementation of DCT Accelerators in SOPC-based Embedded System for Digital Color Image Watermarking	Ruei-Xi Chen; Hung-Chih Chang; Wen-Hao Chang
2007-09-28	Design and Layout a 1.8GHz Low Phase-Noise VCO	Meng-Ting Hsu; Yan-Liang Yeh; Hong-Jyun Li
2007-09-28	Efficient Design of Diminished-One Modulo 2n+1Adder Using Circular Carry Selection	Su-Hon Lin; Ming-Hwa Sheu; Kuang-Hui Wang; Jun-Jie Zhu; Si-Ying Chen
2007-09-28	An Efficient Task Scheduling Algorithm for Partial Reconfigurable FPGA-Based Systems	Trong-Yen Lee; Chieh-I Yu; Yang-Hsin Fang; Chia-Chun Tsai; Rong-Shue Hsiao
2007-09-28	Efficient Truncated Multiplier Design for Low Error	郭源欽; 林智傑; 許明華
2007-09-28	The Embedded Middleware and Development The Embedded Middleware and Development Development Approach	Yu-Hung Guo; Ching-Hsiang Chuang; Wei-Chung Chou; Wen-Yu Su; Chung-Ping Young; Redtom Lin
2007-09-28	Flexible Gamma Correction Circuit for TFT LCD Source Driver IC	Po-Ming Lee; Chia-Hao Hsu; Hsiang-Yuan Cheng; Hung-Yi Chen
2007-09-28	FPGA-based掃描式頻譜感知系統設計	林明權; 蔡國瑞; 康智發; 鄭青峰; 韓義祥; 王二郎
2007-09-28	A Game Application for Embedded Linux System	Wei-Lun Wang; Ting-Ying Wei
2007-09-28	Low Power Multiplier Design Using Enhanced Column Bypassing Scheme	Jin-Fa Lin; Shou-Wei Chen; Zheng-Hao Ye; Ming-Hwa Sheu
2007-09-28	MPEG-2 視訊解碼器之系統分析與軟硬體分割	李宗演; 胡昌平; 黃湧焜; 蔡加春; 蕭榮修
2007-09-28	A New FBCCII-Based Pipelined ADC	Yuh-Shyan Hwang; Jeen-Fong Lin; Hsing-Yen Wu; Jiann-Jong Chen
2007-09-28	A New High-Speed Counter Based Viterbi Decoder	Wei-Chiang Su; Jian-Tang Liao; Kuen-Ru Tsai; Po-Hui Yang
2007-09-28	A New Sub-1 V Low-Power CMOS Adder Core	Yu-Cherng Hung; Chiou-Kou Tung; Shao-Hui Shieh; Bo-Yuan Shieh

顯示項目1-25 / 64. (共3頁) 1 2 3 > >> 每頁顯示[10|25|50]項目